With the increasing amount of data to be processed and transported, there is an increasing need for a processing system that can provide significantly faster performance than existing processing systems. One way to improve the performance of a processing system is to use a multi-stage pipeline structure in the processing system.
Due to the long development time (e.g., over 2 years) and long deployment period (e.g., 5-10 years) of integrated circuits (ICs), it may be desirable to design multi-stage pipeline ICs in a configurable manner such that the ICs may be suitable for different applications, including possible future new applications. For example, it may be desirable for a pipeline structure in a network device to allow both encryption after digital signature and digital signature after encryption. It may also be desirable for a pipeline structure in a network device to be able to handle current protocols and future new protocols.